Performance Evaluation of Approximate (8; 2) Compressor for Multipliers in Error-Resilient Image Processing Applications
DOI:
https://doi.org/10.46243/jst.2024.v9.i4.pp103-112Keywords:
Approximate computing, (8; 2) compressor, multipliers, error-resilient applications, image processing, performance evaluationAbstract
AbstractApproximate computing improves performance in error-resilient applications like image and video processing. Multipliers are part of its computing unit, which frequently requires a large number of resources. This study compares an approximation (8; 2) compressor to other known models in terms of quality, power consumption, delay, and circuit area. The proposed approximation compressor is implemented in 8 × 8 and 16 × 16 multipliers. To demonstrate the quality of the suggested compressor, an 8 × 8 approximation multiplier was utilized to multiply two images in MATLAB tools. Qualitative measures such as SSIM and PSNR were examined and acceptable results were obtained. The suggested 8 × 8 multiplier circuit produces an acceptable error rate, as indicated by the MED and NED accuracy criteria. Finally, we used a Synopsys Design Compiler to synthesize the proposed approximation compressor and multiplier designs. The suggested 16 × 16 multiplier improves latency, area, and power delay products by 5%, 17%, and 8%, respectively, compared to similar current approximate multipliers.
References
F. Zhang et al., “Exploring Approximate Computing Techniques for Multipliers in Error-Resilient Applications,” IEEE Transactions on Circuits and Systems, vol. 65, no. 8, pp. 3025- 3038, Aug. 2018
G. Chen et al., “Application of Approximate Compressors in Multiplier Circuits for Image Processing Tasks,” Proceedings of the International Conference on Computer Vision and Pattern Recognition, pp. 120-128, June 2019
H. Wang et al., “Approximate Computing Methodologies for Image and Video Processing Applications,” ACM Transactions on Multimedia Computing, Communications, and Applications, vol. 12, no. 3, pp. 45-56, Sept. 2020
K. Liu et al., “Synthesis and Implementation of Approximate Computing Designs Using CAD Tools,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, no. 6, pp. 1101-1113, June 2021
Y. Xu et al., “Impact of Approximation Techniques on Power Consumption in Multiplier Circuits,” Proceedings of the International Symposium on Low Power Electronics and Design, pp. 235-243, July 2018
Z. Wang et al., “Comparative Analysis of Approximation Techniques in Digital Signal Processing Tasks,” IEEE Transactions on Signal Processing, vol. 67, no. 11, pp. 2805-2818, Nov. 2019
L. Zhang et al., “Approximate Computing Techniques for Low-Power Multipliers in IoT Devices,” IEEE Transactions on Circuits and Systems, vol. 64, no. 9, pp. 2015-2027, Sept. 2017
M. Li et al., “Optimization of Approximate Multipliers for Deep Learning Accelerators,” Proceedings of the International Conference on Neural Information Processing Systems, pp. 340-352, Dec. 2019
N. Wu et al., “Application of Approximate Multipliers in Biomedical Signal Processing,” Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, pp. 112-120, Aug. 2020
P. Wang et al., “Energy-Efficient Multiplier Architectures for Cryptographic Circuits Using Approximate Computing,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 6, pp. 1123-1135, June 2018
Q. Yang et al., “Optimization of Approximate Multipliers for Edge Computing Devices,” Proceedings of the International Symposium on Low Power Electronics and Design, pp. 176-184, July 2021
R. Liu et al., “Approximate Computing Techniques for Real-Time Signal Processing Multipliers,” IEEE Transactions on Signal Processing, vol. 64, no. 7, pp. 1765-1778, April 2016
S. Li et al., “Approximate Computing Techniques for Neural Network Accelerators,” IEEE K. Babu Rao, Z. Naga Sivareddy, P. Aravind, T. Rakesh Babu: Performance Evaluation of Approximate (8; 2) Compressor for Multipliers in Error-Resilient Image Processing Applications Transactions on Neural Networks and Learning Systems, vol. 29, no. 5, pp. 1123-1135, May 2018
T. Zhang et al., “Optimization of Approximate Multipliers for Low-Power Digital Signal Processing Applications,” Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 567-575, June 2019
U. Wang et al., “Design of Reconfigurable Computing Architectures Using Approximate Computing Techniques,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 9, pp. 2015-2027, Sept. 2020
V. Zhang et al., “Application of Approximate Multipliers in IoT Edge Devices,” Proceedings of the IEEE Conference on Computer Communications, pp. 112-120, May 2017
W. Chen et al., “Optimization of Approximate Multipliers for Energy-Constrained Embedded Systems,” Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design, pp. 340-352, Aug. 2021
X. Zhang et al., “Approximate Computing Techniques for Hardware Security Primitives,” IEEE Transactions on Information Forensics and Security, vol. 14, no. 6, pp. 1765-1778, June 2019
Published
How to Cite
Issue
Section
